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Attacker Value
Unknown

CVE-2018-3639

Disclosure Date: May 22, 2018 (last updated November 26, 2024)
Systems with microprocessors utilizing speculative execution and speculative execution of memory reads before the addresses of all prior memory writes are known may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis, aka Speculative Store Bypass (SSB), Variant 4.
Attacker Value
Unknown

CVE-2018-3640

Disclosure Date: May 22, 2018 (last updated November 26, 2024)
Systems with microprocessors utilizing speculative execution and that perform speculative reads of system registers may allow unauthorized disclosure of system parameters to an attacker with local user access via a side-channel analysis, aka Rogue System Register Read (RSRE), Variant 3a.
0
Attacker Value
Unknown

CVE-2017-5703

Disclosure Date: April 03, 2018 (last updated November 26, 2024)
Configuration of SPI Flash in platforms based on multiple Intel platforms allow a local attacker to alter the behavior of the SPI flash potentially leading to a Denial of Service.
0
Attacker Value
Unknown

CVE-2018-9056

Disclosure Date: March 27, 2018 (last updated November 26, 2024)
Systems with microprocessors utilizing speculative execution may allow unauthorized disclosure of information to an attacker with local user access via a side-channel attack on the directional branch predictor, as demonstrated by a pattern history table (PHT), aka BranchScope.
0
Attacker Value
Unknown

CVE-2017-5754

Disclosure Date: January 04, 2018 (last updated November 26, 2024)
Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis of the data cache.
0
Attacker Value
Unknown

CVE-2017-5926

Disclosure Date: February 27, 2017 (last updated November 26, 2024)
Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.
0
Attacker Value
Unknown

CVE-2017-5925

Disclosure Date: February 27, 2017 (last updated November 26, 2024)
Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern Intel processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.
0
Attacker Value
Unknown

CVE-2017-5927

Disclosure Date: February 27, 2017 (last updated November 26, 2024)
Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.
0