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Attacker Value
Unknown

CVE-2018-3620

Disclosure Date: August 14, 2018 (last updated November 08, 2023)
Systems with microprocessors utilizing speculative execution and address translations may allow unauthorized disclosure of information residing in the L1 data cache to an attacker with local user access via a terminal page fault and a side-channel analysis.
0
Attacker Value
Unknown

CVE-2017-5704

Disclosure Date: July 10, 2018 (last updated November 27, 2024)
Platform sample code firmware included with 4th Gen Intel Core Processor, 5th Gen Intel Core Processor, 6th Gen Intel Core Processor, and 7th Gen Intel Core Processor potentially exposes password information in memory to a local attacker with administrative privileges.
0
Attacker Value
Unknown

CVE-2018-3693

Disclosure Date: July 10, 2018 (last updated November 27, 2024)
Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a speculative buffer overflow and side-channel analysis.
Attacker Value
Unknown

CVE-2018-3665

Disclosure Date: June 21, 2018 (last updated November 26, 2024)
System software utilizing Lazy FP state restore technique on systems using Intel Core-based microprocessors may potentially allow a local process to infer data from another process through a speculative execution side channel.
Attacker Value
Unknown

CVE-2018-9056

Disclosure Date: March 27, 2018 (last updated November 26, 2024)
Systems with microprocessors utilizing speculative execution may allow unauthorized disclosure of information to an attacker with local user access via a side-channel attack on the directional branch predictor, as demonstrated by a pattern history table (PHT), aka BranchScope.
0
Attacker Value
Unknown

CVE-2017-5754

Disclosure Date: January 04, 2018 (last updated November 26, 2024)
Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis of the data cache.
0